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  july 2015 docid027807 rev 2 1 / 16 this is information on a product in full production. www.st.com STD45P4LLF6AG automotive - grade p - channel - 40 v, 12 m typ., - 50 a stripfet? f6 power mosfet in a dpak package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max. i d STD45P4LLF6AG - 40 v 15 m - 50 a ? designed for automotive applications and aec - q101 qualified ? very low on - resistance ? very low gate charge ? high avalanche ruggedness ? low gate drive power loss applications ? switching applications description this device is a p - channel power mosfet developed using the stripfet? f6 technology, with a new trench gate structure. the resulting power mosfet exhibits very low r ds(on) in all packages. table 1: device summary order code marking package packing STD45P4LLF6AG 45p4llf6 dpak tape and reel am 1 1258v1 d(2, t ab) s(3) g(1)
contents STD45P4LLF6AG 2 / 16 docid027807 rev 2 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 8 4 package information ................................ ................................ ....... 9 4.1 dpak (to - 252) type a2 package information ................................ . 10 4.2 dpa k (to - 252) packing information ................................ ............... 13 5 revision history ................................ ................................ ............ 15
STD45P4LLF6AG electrical ratings docid027807 rev 2 3 / 16 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage - 40 v v gs gate - source voltage 18 v v i d drain current (continuous) at t case = 25 c - 50 a drain current (continuous) at t case = 100 c - 31 i dm (1) drain current (pulsed) - 200 a p tot total dissipation at t case = 25 c 58 w e as (2) single pulse avalanche energy 160 mj t stg storage temperature C 55 to 150 c t j (3) operating junction temperature notes: (1) pulse width is limited by safe operating area. (2) starting t j = 25 c, r g = 47 , i d(min) = - 25 a. (3) htrb performed at t j = 175 c, v ds = 100% v (br)dss . table 3: thermal data symbol parameter value unit r thj - case thermal resistance junction - case 2.14 c/w r thj - amb thermal resistance junction - ambient 50
electrical characteristics STD45P4LLF6AG 4 / 16 docid027807 rev 2 2 electrical characteristics (t case = 25 c unless otherwise specified) table 4: static symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0 v, i d = - 250 a - 40 v i dss zero gate voltage drain current v gs = 0 v, v ds = - 40 v - 1 a v gs = 0 v, v ds = - 40 v, t case = 125 c - 10 i gss gate - body leakage current v ds = 0 v, v gs = - 18 v - 100 na v gs(th) gate threshold voltage v ds = v gs , i d = - 250 a - 1 - 2.5 v r ds(on) static drain - source on - resistance v gs = - 10 v, i d = - 25 a 12 15 m v gs = - 4.5 v, i d = - 25 a 17 20 table 5: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = - 25 v, f = 1 mhz, v gs = 0 v - 3525 - pf c oss output capacitance - 345 - c rss reverse transfer capacitance - 240 - q g total gate charge v dd = - 20 v, i d = - 50 a, v gs = - 10 v (see figure 14: "gate charge test circuit" ) - 65.5 - nc q gs gate - source charge - 11.5 - q gd gate - drain charge - 13 - table 6: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = - 20 v, i d = - 25 a r g = 4.7 , v gs = - 10 v (see figure 13: "switching times test circuit for resistive load" ) - 12 - ns t r rise time - 35.5 - t d(off) turn - off delay time - 63.5 - t f fall time - 31 -
STD45P4LLF6AG electrical characteristics docid027807 rev 2 5 / 16 table 7: source - drain diode symbol parameter test conditions min. typ. max. unit i sd source - drain current - - 50 a i sdm (1) source - drain current (pulsed) - - 200 a v sd (2) forward on voltage v gs = 0 v, i sd = - 50 a - - 1.3 v t rr reverse recovery time i sd = - 50 a, di/dt = -100 a/s, v dd = - 32 v (see figure 15: "test circuit for inductive load switching and diode recovery times" ) - 27.5 ns q rr reverse recovery charge - 24.5 nc i rrm reverse recovery current - - 1.8 a notes: (1) pulse width is limited by safe operating area. (2) pulse test: pulse duration = 300 s, duty cycle 1.5%.
electrical characteristics STD45P4LLF6AG 6 / 16 docid027807 rev 2 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance
STD45P4LLF6AG electric al characteristics docid027807 rev 2 7 / 16 figure 8 : capacitance variations figure 9 : normalized gate threshold voltage vs temperature figure 10 : normalized on - resistance vs temperature figure 11 : normalized v(br)dss vs temperature figure 12 : source - drain diode forward characteristics for the p - channel power mosfet, current and voltage polarities are reversed.
test circuits STD45P4LLF6AG 8 / 16 docid027807 rev 2 3 test circuits figure 13 : switching times test circuit for resistive load figure 14 : gate charge test circuit figure 15 : test circuit for inductive load switching and diode recovery times
STD45P4LLF6AG package information docid027807 rev 2 9 / 16 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
package information STD45P4LLF6AG 10 / 16 docid027807 rev 2 4.1 dpak (to - 252) type a2 package information figure 16 : dpak (to - 252) type a2 package outline
STD45P4LLF6AG package information docid027807 rev 2 11 / 16 table 8: dpak (to - 252) type a2 mechanical data dim. mm min. typ. max. a 2.20 2.40 a1 0.90 1.10 a2 0.03 0.23 b 0.64 0.90 b4 5.20 5.40 c 0.45 0.60 c2 0.48 0.60 d 6.00 6.20 d1 4.95 5.10 5.25 e 6.40 6.60 e1 5.10 5.20 5.30 e 2.16 2.28 2.40 e1 4.40 4.60 h 9.35 10.10 l 1.00 1.50 l1 2.60 2.80 3.00 l2 0.65 0.80 0.95 l4 0.60 1.00 r 0.20 v2 0 8
package i nformation STD45P4LLF6AG 12 / 16 docid027807 rev 2 figure 17 : dpak (to - 252) recommended footprint (dimensions are in mm)
STD45P4LLF6AG package information docid027807 rev 2 13 / 16 4.2 dpak (to - 252) packing information figure 18 : dpak (to - 252) tape outline
package information STD45P4LLF6AG 14 / 16 docid027807 rev 2 figure 19 : dpak (to - 252) reel outline table 9: dpak (to - 252) tape and reel mechanical data tape reel dim. mm dim. mm min. max. min. max. a0 6.8 7 a 330 b0 10.4 10.6 b 1.5 b1 12.1 c 12.8 13.2 d 1.5 1.6 d 20.2 d1 1.5 g 16.4 18.4 e 1.65 1.85 n 50 f 7.4 7.6 t 22.4 k0 2.55 2.75 p0 3.9 4.1 base qty. 2500 p1 7.9 8.1 bulk qty. 2500 p2 1.9 2.1 r 40 t 0.25 0.35 w 15.7 16.3
STD45P4LLF6AG revision history docid027807 rev 2 15 / 16 5 revision history table 10: document revision history date revision changes 28 - apr - 2015 1 first release. 22 - jul - 2015 2 modified: v gs values in absoute maximum ratings table and static table. updated: dpak (to - 252) type a2 package information section updated. minor text changes.
STD45P4LLF6AG 16 / 16 docid027807 rev 2 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2015 stmicroelectronics C all rights reserved


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